| Current view: | top level - src/components/verilog - logic_0.core.h (source / functions) | Hit | Total | Coverage | ||
| Test: | qucs-core-0.0.19 Code Coverage | Lines: | 1 | 2 | 50.0 % | |
| Date: | 2015-01-05 16:01:02 | Functions: | 1 | 4 | 25.0 % | |
| Legend: | Lines: hit not hit | Branches: + taken - not taken # not executed | Branches: | 0 | 4 | 0.0 % | |
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